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An Area Efficient design of Fully Pipelined, 2D-DCT, Quantizer and Zigzag JPEG Encoder using VHDL
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Article Details:
Author: editor@ijcaonline.org (Administrator)
Language: English
Channel Number: 72158233
Article Number: 1
Date: March 13, 2013, 7:02 pm
URL: http://www.ijcaonline.org/archives/volume65/number10/10964-5935
GUID: http://www.ijcaonline.org/archives/volume65/number10/10964-5935
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